The always excellent IEEE Spectrum has a great article right now that is both a primer for current chip manufacturing techniques and a look at what the challenges are that chipmakers are facing. As we’ve talked about before, Moore’s law has continued to apply only through the utmost efforts and desperate “cheats” by the engineers who design the chips and the process to create them. But we’re running into some fundamental barriers, many of which have been circumvented before only to have them crop up again, more formidable this time. What is to be done?
Double-patterning lithography is the current stopgap solution. Their very elegant explanation of the idea is of taking two picket fences with the maximum possible post density (the posts representing transistors) and aligning them, one behind the other, so that there are no gaps between the posts. What they’re planning on doing is printing two different patterns at the limit of density right now that are complementary with each other, then essentially putting them on top of one another. They’re really MacGyvering things here but hey, whatever works, right?